1. Field of the Invention
The present invention relates to a protection circuit for protecting a semiconductor device from electrostatic discharge (ESD) and other surges.
2. Description of the Prior Art
FIG. 1A shows a first example of a protection circuit according to the prior art. In the first example, the drain regions of transistors 203 and 204 forming an output buffer 202 are connected directly to a pad 201. The gate electrodes of the transistor 203 and 204 are connected directly to internal circuits 205 and 206.
If an electrostatic or other surge is applied to the pad 201, the first example of the prior art raises a problem. Electrostatic discharged damage or variations of characteristics may occur in the gate insulation films of the transistors 203, 204 having drain regions which initiate an avalanche breakdown.
Second and third examples of the prior art for overcoming such a problem in the first prior art example are disclosed in Japanese Patent Application Laid-Open Nos. 5-275624 and 2-277265.
As shown in FIG. 1B, the second prior art example includes a transistor 215 connected in series to a pad 211 and also in parallel to an output buffer 212. The transistor 215 has its gate electrode connected to a normally turned-on transistor 216. In the second prior art example, the output buffer 212 and the like are protected by provision of the transistor 215. The normally turned-on transistor 216 is connected to the gate electrode of the transistor 215, so as to prevent the gate insulating film of the transistor 215 from being electrostatically ruptured.
As shown in FIG. 1C, the third example of the prior art includes transistors 224 and 225 connected in series to a pad 221 and also in parallel to an input buffer 222. The gate electrodes of the transistors 224 and 225 are connected to resistors 226 and 227, respectively. The input buffer 222 and the like are protected by provision of the transistors 224 and 225. The resistors 225 and 227 are connected to the gate electrodes of the transistors 224 and 225, so as to prevent the gate insulating films of the transistors 225 and 225 from being electrostatically broken down.
However, the second prior art example of FIG. 1B requires further transistors 215, 216, in addition to the output buffer 212. This increases the area of the protection circuit occupied by these components, resulting in increase of the chip area.
Furthermore, in FIG. 1B, the transistor 216 with a resistance component is connected to the gate electrode of the transistor 215. If the potential rapidly changes in the pad 211, the potential in the gate electrode of the transistor 215 cannot follow such a change of potential. As a result, the gate insulating film of the transistor 215 would be electrostatically ruptured. In the third prior art example of FIG. 1C, the resistors 226 and 227 are respectively connected to the gate electrodes of the transistors 224 and 225. Such a feature raises another problem when the potential in the pad 221 changes rapidly. That is, it would take some time for the potential in the gate electrodes to follow such a change of potential.